防火区 30米:vivi源代码分析1 (转载)
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vivi源代码分析1
2008-06-01 17:02 590人阅读 评论(0) 收藏 举报通过vivi研究bootloader有一段时间了,基本是在与之相关的基础方面做工作,还没有真正深入研究vivi。以后的学习重心就要放到研究vivi源代码上面了。我想,真正细致地弄清楚vivi实现的细节,对C语言水平的提高,对ARM体系结构的认识,对S3C2410的熟悉,对嵌入式bootloader相关技术,都能有很大的好处。学习的进度会慢一些,但是务求深入,并且打好相关的基础。
一、写在前面的话嵌入式系统软件开发主要包括五个方面:bootloader编写(移植)、驱动程序编写(移植)、操作系统裁减(移植)、文件系统制作、应用程序编写(移植)。嵌入式开发流程我已经熟悉,但是仅限于完成最为基本的工作,大部分是借助网络资料,自己独立解决的问题很有限。学习嵌入式系统已经一年了,算是入门了。然而,入门之后如何继续深入学习嵌入式系统开发,如何提高自身的能力?
我想,这也许是独立摸索的学习者都会遇到的问题吧。思考之后有所得,核心就是一句话:务实,理论与实践结合!具体说来,就是要不断的认识自己,去了解自己最适合做什么。这是最为重要的,如果不知道做什么,就无法安排学习的重点。嵌入式开发的领域太广,要想在方方面面都深入不太容易(当然牛人除外)。现在对自己的认识如下:本科有硬件、通信背景,但是没有太多机会进行硬件设计。而硬件设计最为重要的就是经验,动手能力,所以不打算把硬件设计作为学习的重点。底层软件开发既需要对硬件熟悉,又需要软件设计能力,正适合我。所以以后的学习,以底层软件开发(bootloader设计、驱动程序设计)为重点,同时也要加强硬件学习。学习有重点,但是嵌入式开发的其他领域也要涉及,了解广博才能更有助于设计。进展慢不要紧,关键是要深入,深入,再深入。真正地去理解这些技术,并且能够熟练的应用。这半年的核心就是bootloader技术研究,打算先看vivi,然后看uboot。手头上的板子有s3c2410、at91rm9200,这些都可以拿来训练,争取能够通过bootloader技术的掌握,同时熟悉了ARM体系结构、ARM汇编、开发工具等等一系列相关内容,总结学习的方法,提高学习能力。 二、准备工作 在分析vivi源代码的时候,不打算完全按照vivi的代码来进行。我的思路是,以从nand flash启动为主线,分析从上电到引导内核的过程。以自己的理解去实现vivi的源代码,要自己手动编写,即使与vivi的代码相同。只有这样,才能从整体上理解vivi的设计方法,理解vivi各个功能的实现细节。这份文档算是自己的学习笔记,尽可能详细,同时希望有研究vivi的朋友一起交流,我的email:piaoxiangxinling@163.com。 三、bootloader stage1:【arch/s3c2410/head.S】 首先解决一个问题,就是为什么使用head.S而不是用head.s?有了GNU AS和GNU Gcc的基础,不难理解主要原因就是为了使用C预处理器的宏替换和文件包含功能(GNU AS的预处理无法完成此项功能)。可以参考前面的总结部分。这样的好处就是可以使用C预处理器的功能来提高ARM汇编的程序设计环境,更加方便。但是因为ARM汇编和C在宏替换的细节上有所不同,为了区分,引入了__ASSEMBLY__这个变量,这是通过Makefile中AFLAGS来引入的,具体如下:
AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS)
#include "config.h"
#include "linkage.h"
#include "machine.h"
#ifndef _CONFIG_H_
#define _CONFIG_H_
#include "autoconf.h"
#endif /* _CONFIG_H_ */
[armlinux@lqm include]$ cat linkage.h
#ifndef _VIVI_LINKAGE_H
#define _VIVI_LINKAGE_H
#define SYMBOL_NAME(X) X
#ifdef __STDC__
#define SYMBOL_NAME_LABEL(X) X##:
#else
#define SYMBOL_NAME_LABEL(X) X/**/:
#endif
#ifdef __ASSEMBLY__
#define ALIGN .align 0
#define ENTRY(name) /
.globl SYMBOL_NAME(name); /
ALIGN; /
SYMBOL_NAME_LABEL(name)
#endif
#endif
[root@lqm vivi_myboard]# gcc -E -D__ASSEMBLY__ -I./include arch/s3c2410/head.S >aaa
# 1 "arch/s3c2410/head.S"
# 1 "
# 1 "
# 1 "arch/s3c2410/head.S"
# 35 "arch/s3c2410/head.S"
# 1 "include/config.h" 1
# 14 "include/config.h"
# 1 "include/autoconf.h" 1
# 15 "include/config.h" 2
# 36 "arch/s3c2410/head.S" 2
# 1 "include/linkage.h" 1
# 37 "arch/s3c2410/head.S" 2
# 1 "include/machine.h" 1
# 19 "include/machine.h"
# 1 "include/platform/smdk2410.h" 1
# 1 "include/s3c2410.h" 1
# 22 "include/s3c2410.h"
# 1 "include/hardware.h" 1
# 23 "include/s3c2410.h" 2
# 1 "include/bitfield.h" 1
# 24 "include/s3c2410.h" 2
# 3 "include/platform/smdk2410.h" 2
# 1 "include/sizes.h" 1
# 8 "include/platform/smdk2410.h" 2
# 74 "include/platform/smdk2410.h"
# 1 "include/architecture.h" 1
# 75 "include/platform/smdk2410.h" 2
# 20 "include/machine.h" 2
# 38 "arch/s3c2410/head.S" 2
@ Start of executable code
宏定义展开
.globl _start; .align 0; _start:
.globl ResetEntryPoint; .align 0; ResetEntryPoint:
下面是装载中断向量表,ARM规定,在起始必须有8条跳转指令,你可以用b,也可以用ldr pc,文件名。这样的8条规则的标志被arm定义为bootloader的识别标志,检测到这样的标志后,就可以从该位置启动。这样的做法是因为开始的时候不一定有bootloader,必须有一种识别机制,如果识别到bootloader,那么就从bootloader启动。
@
@ Exception vector table (physical address = 0x00000000)
@
@ 0x00: Reset
b Reset
@ 0x04: Undefined instruction exception
UndefEntryPoint:
b HandleUndef
@ 0x08: Software interrupt exception
SWIEntryPoint:
b HandleSWI
@ 0x0c: Prefetch Abort (Instruction Fetch Memory Abort)
PrefetchAbortEnteryPoint:
b HandlePrefetchAbort
@ 0x10: Data Access Memory Abort
DataAbortEntryPoint:
b HandleDataAbort
@ 0x14: Not used
NotUsedEntryPoint:
b HandleNotUsed
@ 0x18: IRQ(Interrupt Request) exception
IRQEntryPoint:
b HandleIRQ
@ 0x1c: FIQ(Fast Interrupt Request) exception
FIQEntryPoint:
b HandleFIQ
下面是固定位置存放环境变量
@
@ VIVI magics
@
@ 0x20: magic number so we can verify that we only put
.long 0
@ 0x24:
.long 0
@ 0x28: where this vivi was linked, so we can put it in memory in the right place
.long _start
@ 0x2C: this contains the platform, cpu and machine id
.long ((1 << 24) | (6 << 16) | 193)
@ 0x30: vivi capabilities
.long 0
@ 0x34:
b SleepRamProc
@
@ Start VIVI head
@
Reset:
@ disable watch dog timer
mov r1, #0x53000000
mov r2, #0x0
str r2, [r1]
# 121 "arch/s3c2410/head.S"
@ disable all interrupts
mov r1, #0x4A000000
mov r2, #0xffffffff
str r2, [r1, #0x08]
ldr r2, =0x7ff
str r2, [r1, #0x1C]
@ initialise system clocks
mov r1, #0x4C000000
mvn r2, #0xff000000
str r2, [r1, #0x00]
@ldr r2, mpll_50mhz
@str r2, [r1, #0x04]
@ 1:2:4
mov r1, #0x4C000000
mov r2, #0x3
str r2, [r1, #0x14]
mrc p15, 0, r1, c1, c0, 0 @ read ctrl register
orr r1, r1, #0xc0000000 @ Asynchronous
mcr p15, 0, r1, c1, c0, 0 @ write ctrl register
@ now, CPU clock is 200 Mhz
mov r1, #0x4C000000
ldr r2, mpll_200mhz
str r2, [r1, #0x04]
# 164 "arch/s3c2410/head.S"
bl memsetup
@ Check if this is a wake-up from sleep
ldr r1, PMST_ADDR
ldr r0, [r1]
tst r0, #((1 << 1))
bne WakeupStart
@ All LED on
mov r1, #0x56000000
add r1, r1, #0x50
ldr r2,=0x55aa
str r2, [r1, #0x0]
mov r2, #0xff
str r2, [r1, #0x8]
mov r2, #0x00
str r2, [r1, #0x4]
# 230 "arch/s3c2410/head.S"
@ set GPIO for UART
mov r1, #0x56000000
add r1, r1, #0x70
ldr r2, gpio_con_uart
str r2, [r1, #0x0]
ldr r2, gpio_up_uart
str r2, [r1, #0x8]
bl InitUART
# 259 "arch/s3c2410/head.S"
bl copy_myself
@ jump to ram
ldr r1, =on_the_ram
add pc, r1, #0
nop
nop
1: b 1b @ infinite loop
on_the_ram:
# 279 "arch/s3c2410/head.S"
@ get read to call C functions
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0 @ no previous frame, so fp=0
mov a2, #0 @ set argv to NULL
bl main @ call main
mov pc, #0x00000000 @ otherwise, reboot
@
@ End VIVI head
@
下面是子例程
@
@ Wake-up codes
@
WakeupStart:
@ Clear sleep reset bit
ldr r0, PMST_ADDR
mov r1, #(1 << 1)
str r1, [r0]
@ Release the SDRAM signal protections
ldr r0, PMCTL1_ADDR
ldr r1, [r0]
bic r1, r1, #((1 << 19) | (1 << 18) | (1 << 17))
str r1, [r0]
@ Go...
ldr r0, PMSR0_ADDR @ read a return address
ldr r1, [r0]
mov pc, r1
nop
nop
1: b 1b @ infinite loop
SleepRamProc:
@ SDRAM is in the self-refresh mode */
ldr r0, REFR_ADDR
ldr r1, [r0]
orr r1, r1, #(1 << 22)
str r1, [r0]
@ wait until SDRAM into self-refresh
mov r1, #16
1: subs r1, r1, #1
bne 1b
@ Set the SDRAM singal protections
ldr r0, PMCTL1_ADDR
ldr r1, [r0]
orr r1, r1, #((1 << 19) | (1 << 18) | (1 << 17))
str r1, [r0]
ldr r0, PMCTL0_ADDR
ldr r1, [r0]
orr r1, r1, #(1 << 3)
str r1, [r0]
1: b 1b
# 379 "arch/s3c2410/head.S"
.globl memsetup; .align 0; memsetup:
@ initialise the static memory
@ set memory control registers
mov r1, #0x48000000
adrl r2, mem_cfg_val
add r3, r1, #52
1: ldr r4, [r2], #4
str r4, [r1], #4
cmp r1, r3
bne 1b
mov pc, lr
@
@ copy_myself: copy vivi to ram
@
copy_myself:
mov r10, lr
@ reset NAND
mov r1, #0x4E000000
ldr r2, =0xf830 @ initial value
str r2, [r1, #0x00]
ldr r2, [r1, #0x00]
bic r2, r2, #0x800 @ enable chip
str r2, [r1, #0x00]
mov r2, #0xff @ RESET command
strb r2, [r1, #0x04]
mov r3, #0 @ wait
1: add r3, r3, #0x1
cmp r3, #0xa
blt 1b
2: ldr r2, [r1, #0x10] @ wait ready
tst r2, #0x1
beq 2b
ldr r2, [r1, #0x00]
orr r2, r2, #0x800 @ disable chip
str r2, [r1, #0x00]
@ get read to call C functions (for nand_read())
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0 @ no previous frame, so fp=0
@ copy vivi to RAM
ldr r0, =(0x30000000 + 0x04000000 - 0x00100000)
mov r1, #0x0
mov r2, #0x20000
bl nand_read_ll
tst r0, #0x0
beq ok_nand_read
# 441 "arch/s3c2410/head.S"
ok_nand_read:
@ verify
mov r0, #0
ldr r1, =0x33f00000
mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes
go_next:
ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne notmatch
subs r2, r2, #4
beq done_nand_read
bne go_next
notmatch:
# 469 "arch/s3c2410/head.S"
1: b 1b
done_nand_read:
mov pc, r10
@ clear memory
@ r0: start address
@ r1: length
mem_clear:
mov r2, #0
mov r3, r2
mov r4, r2
mov r5, r2
mov r6, r2
mov r7, r2
mov r8, r2
mov r9, r2
clear_loop:
stmia {r2-r9}
subs r1, r1, #(8 * 4)
bne clear_loop
mov pc, lr
# 613 "arch/s3c2410/head.S"
@ Initialize UART
@
@ r0 = number of UART port
InitUART:
ldr r1, SerBase
mov r2, #0x0
str r2, [r1, #0x08]
str r2, [r1, #0x0C]
mov r2, #0x3
str r2, [r1, #0x00]
ldr r2, =0x245
str r2, [r1, #0x04]
mov r2, #((50000000 / (115200 * 16)) - 1)
str r2, [r1, #0x28]
mov r3, #100
mov r2, #0x0
1: sub r3, r3, #0x1
tst r2, r3
bne 1b
# 653 "arch/s3c2410/head.S"
mov pc, lr
@
@ Exception handling functions
@
HandleUndef:
1: b 1b @ infinite loop
HandleSWI:
1: b 1b @ infinite loop
HandlePrefetchAbort:
1: b 1b @ infinite loop
HandleDataAbort:
1: b 1b @ infinite loop
HandleIRQ:
1: b 1b @ infinite loop
HandleFIQ:
1: b 1b @ infinite loop
HandleNotUsed:
1: b 1b @ infinite loop
@
@ Low Level Debug
@
# 838 "arch/s3c2410/head.S"
@
@ Data Area
@
@ Memory configuration values
.align 4
mem_cfg_val:
.long 0x22111110
.long 0x00000700
.long 0x00000700
.long 0x00000700
.long 0x00000700
.long 0x00000700
.long 0x00000700
.long 0x00018005
.long 0x00018005
.long 0x008e0459
.long 0xb2
.long 0x30
.long 0x30
@ Processor clock values
.align 4
clock_locktime:
.long 0x00ffffff
mpll_50mhz:
.long ((0x5c << 12) | (0x4 << 4) | (0x2))
mpll_200mhz:
.long ((0x5c << 12) | (0x4 << 4) | (0x0))
clock_clkcon:
.long 0x0000fff8
clock_clkdivn:
.long 0x3
@ initial values for serial
uart_ulcon:
.long 0x3
uart_ucon:
.long 0x245
uart_ufcon:
.long 0x0
uart_umcon:
.long 0x0
@ inital values for GPIO
gpio_con_uart:
.long 0x0016faaa
gpio_up_uart:
.long 0x000007ff
.align 2
DW_STACK_START:
.word (((((0x30000000 + 0x04000000 - 0x00100000) - 0x00100000) - 0x00004000) - (0x00004000 + 0x00004000 +
0x00004000)) - 0x00008000)+0x00008000 -4
# 922 "arch/s3c2410/head.S"
.align 4
SerBase:
.long 0x50000000
# 935 "arch/s3c2410/head.S"
.align 4
PMCTL0_ADDR:
.long 0x4c00000c
PMCTL1_ADDR:
.long 0x56000080
PMST_ADDR:
.long 0x560000B4
PMSR0_ADDR:
.long 0x560000B8
REFR_ADDR:
.long 0x48000024
[root@lqm vivi_myboard]#
@ 0x00
b Reset
@ 0x04
HandleUndef:
b HandleUndef
@ 0x08
HandleSWI:
b HandleSWI
@ 0x0c
HandlePrefetchAbort:
b HandlePrefetchAbort
@ 0x10
HandleDataAbort:
b HandleDataAbort
@ 0x14
HandleNotUsed:
b HandleNotUsed
@ 0x18
HandleIRQ:
b HandleIRQ
@ 0x1c
HandleFIQ:
b HandleFIQ
@ 0x00
b Reset
@ 0x04
HandleUndef:
b .
@ 0x08
HandleSWI:
b .
@ 0x0c
HandlePrefetchAbort:
b .
@ 0x10
HandleDataAbort:
b .
@ 0x14
HandleNotUsed:
b .
@ 0x18
HandleIRQ:
b .
@ 0x1c
HandleFIQ:
b .
.globl _start
_start: b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
...
/*
* exception handlers
*/
.align 5
undefined_instruction:
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction
...
@ 0x20: magic number so we can verify that we only put
.long 0
@ 0x24:
.long 0
@ 0x28: where this vivi was linked, so we can put it in memory in the right place
.long _start
@ 0x2C: this contains the platform, cpu and machine id
.long ARCHITECTURE_MAGIC
@ 0x30: vivi capabilities
.long 0
/*
* Architecture magic and machine type
*/
#include "architecture.h"
#define MACH_TYPE 193
#define ARCHITECTURE_MAGIC ((ARM_PLATFORM << 24) | (ARM_S3C2410_CPU << 16) | /
MACH_TYPE)
@ jump to ram
@ a technology about trampoline
ldr r1, =on_the_ram
add pc, r1, #0
nop
nop
1:
b 1b
on_the_ram:
@ setup by APCS
ldr sp, DW_STACK_START @ setup stack pointer
mov fp, #0 @ no previous frame, so fp=0
mov a2, #0 @ set argv to NULL
bl main @ call main
mov pc, #FLASH_BASE @ otherwise, reboot